The present disclosure relates to a semiconductor device and a method of manufacturing the semiconductor device, particularly to the semiconductor device that includes a low resistance region in a barrier layer between a gate electrode and a channel layer, and the method of manufacturing the same.
In recent years, in a mobile communication system such as a mobile phone, it has been necessary to miniaturize the size and reduce the power consumption in the mobile communication terminal. In order to realize those demands, for example, a reduction of ON resistance Ron is necessary with regard to an antenna switch.
As a semiconductor device that has been in practical use for that antenna switch, a junction-type field effect transistor (JPHEMT; Junction Pseudomorphic High Electron Mobility Transistor) is disclosed (see, for example, Japanese Unexamined Patent Application Publication No. 11-150264).
In addition, a MIS gate structure type HEMT device which performs a current modulation using: a metal insulator semiconductor (MIS) inversion layer formed using group III nitride materials such as AlGaN/GaN, or AlInN/GaN; and a hetero junction is disclosed (see, for example, Japanese Unexamined Patent Application Publication No. 2009-71270).
Each semiconductor device described above has a structure in which a gate electrode is provided between a source electrode and a drain electrode, and a current flowing between the source electrode and the drain electrode can be modulated. Then, each semiconductor device has only one channel through which carriers are traveling together, and the performance of the transistor is determined by transportation characteristics in the channel.